(1) Field of the Invention
The present invention relates to a semiconductor memory device, more particularly, to a static-type semiconductor memory device in which the danger of destruction of the stored data due to alpha particles or power supply noise is reduced.
(2) Description of the Prior Art
Generally, a static-type semiconductor memory device comprises a memory cell array consisting of a plurality of memory cells, a peripheral circuit for the memory cell array, and a holding-current supplying circuit. The static-type memory cell comprises cross-coupled transistors which constitute a flip-flop. The data storing capacity of the memory cell is expressed by 1/2CV, where C is the amount of the stored charges, and V is the base-base voltage when the above-mentioned transistors, are bipolar transistors or the gate-gate voltage when the above-mentioned transistors are metal-insulator semiconductor (MIS) transistors. The data stored in each memory cell can theoretically be held by continuously supplying a holding current to each memory cell.
However, it is known that, when a semiconductor memory device is assembled into a package, the data stored in the semiconductor memory device are often destroyed due to alpha particles radiated from the package. The stored data may also be destroyed due to power supply noise, i.e., fluctuations of the power supply voltage. Therefore, countermeasures for alpha particles and power supply noise are required.
To obtain a semiconductor memory device resistant to alpha particles and power supply noise, it may be considered to increase the data storing capacity of each memory cell by increasing the above-mentioned C and V. Increase of the C and V of all the memory cells, however, would reduce the switching speed, resulting in an undesirably slower writing speed or reading speed. It may also be considered to increase the data storing capacity by increasing the holding current. Conventionally, however, the same holding currents are supplied to both unselected-state memory IC's and selected-state memory IC's. Therefore, the unselected-state memory cells and the selected-state memory cells have the same C and V. If the holding currents are increased in the conventional device, the C and V for all the memory cells are also increased, resulting in the reduced writing or reading speed.